1. Field of the Invention
This invention relates to a method and apparatus for maintaining the purity of reduced pressure process chambers.
2. Brief Description of the Prior Art
Fabrication processes for semiconductor devices require almost contamination-free conditions. These conditions become continually more stringent with the continued reduction in the geometries of such devices. The prior art has addressed this problem with the advent of gas purifiers, ultra-clean gas cylinder filling technology and the use of welded gas line distribution assemblies, whereby contamination of process chambers used for integrated circuit fabrication by incoming gases has been dramatically reduced (to &lt;5 parts per billion). Another prior art step in process chamber purity has been achieved by the use of vacuum load-lock systems whereby the process chamber is not directly exposed to room ambient. A process chamber may go for weeks or months before it is opened for maintenance using the vacuum load-lock system. However, contamination is still present, even if small, and becomes increasingly significant with the decrease in integrated circuit component geometries.
The present greatest source of impurity introduction into a vacuum load-locked chamber with gas purification systems on the incoming gases appears to be a result of the impurities which leak into the system around the O-ring seals of the vacuum system. When leaks are from the ambient external to the chamber, the contaminant will generally be about twenty percent (20%) oxygen. For many processes, particularly deposition processes in semiconductor fabrication, the oxygen can react with deposition gases, forming oxide particles which may contaminate the wafers or the oxygen may contribute to the formation of a native oxide on the wafer which may be detrimental to the electrical properties of the integrated circuit device being fabricated. It is therefore apparent that an improved system for isolating the processing chamber from the external ambient is required.